Optimized method of addressing a liquid-crystal screen and device for implementing it

ABSTRACT

The present invention relates to an optimized method of addressing liquid-crystal screens. In accordance with the invention, the matrix addressing method, periodically scanning each line with a signal of voltage V A  (t) as a function of time, is characterized in that each period of this signal consists of a plateau up to T F  then a curve which may be a straight-line portion of slope α between T F  and T F&#39; . Application to liquid-crystal screens.

FIELD OF THE INVENTION

The present invention relates to a method of addressing a liquid-crystal screen allowing a display of uniform quality over the entire line of the screen, as well as to a device for implementing this method.

BACKGROUND OF THE INVENTION

A liquid-crystal screen consists of a set of image elements ("pixels", standing for picture element), each formed by an electrode and by a counter electrode framing the liquid crystal, the value of the field between these electrodes altering the optical properties of the liquid crystal. The voltage at the terminals of the electrodes of the pixels is delivered via addressing columns by peripheral circuits ("drivers") by virtue of the control transistors of these pixels, the conducting or non-conducting state of these transistors being determined by selection lines coming from other line drivers.

FIG. 1 represents a selection line Lj of a liquid-crystal screen with m lines and n columns, controlling the transistors T1 to Tn of the pixels P1 to Pn. This line is connected to a line driver which delivers, at A, the square selection signal V_(A) (t) as represented in FIG. 2. The signal V_(A) (t) causes the transistors T1 to Tn of the line L_(j) to conduct, and thus allows the electrodes of the pixels P_(i) to be polarized by the video signal coming from the columns C₁ to C_(n). The capacitances C_(c1) represent the capacitive couplings between the line L_(j) and the counter electrode CE through the liquid crystal. This line L_(j), the end of which is floating, constitutes a delay line which causes distortion of the selection signal at point B by comparison with point A; this signal V_(B) (t) at point B is represented in FIG. 2. This is visible particularly when it is desired to display a uniform image and when the same voltage is applied to all the columns C₁ to C_(n) of the screen. At the instant t_(F), the voltage at the terminals of the capacitances C_(p) formed by the electrodes of the pixels P_(i) and the counter electrode CE is the same. However, after the instant t_(F) this is no longer the case due to the difference between the shapes of the signals V_(A) (t) and V_(B) (t).

This is because, at point A, the voltage drop is very fast, the transistor T₁ is therefore turned off immediately after t_(F). Moreover, a stray capacitance C_(p) exists between the line L_(j) and the pixels P_(i). The voltage drop ΔV_(G) at point A thus, by capacitive coupling, causes a voltage drop on the pixel which is:

    ΔV.sub.1 =C.sub.p /C.sub.pi ×ΔV.sub.G

If V₁ is the voltage supplied to the pixel P₁ by the column C₁, the voltage drop ΔV₁ on the pixel at the instant when the transistor T₁ ceases to conduct is illustrated by FIG. 3a, V_(ce) being the voltage on the counter electrode.

At point B, the phenomenon of capacitive coupling is identical, but in this case the transistor T_(n) continues to conduct as long as the voltage V_(B) (t) is greater than V₁ +V_(t), where V_(t) is the threshold voltage of the transistor. The coupling ΔV_(n) between the line L_(j) and the last pixel P_(n) is therefore weaker than ΔV₁, since, as long as the transistor T_(n) is conducting, the voltage at the terminals of the pixels remains equal to the voltage delivered by the column C_(n). The capacitive coupling thus causes a voltage drop for the pixel P_(n) :

    Δv.sub.n =C.sub.p /C.sub.pi ×ΔV',

ΔV' being the voltage drop at point B.

The voltage which allows the pixels to alter the optical properties of the liquid crystal is therefore V_(pix1) =V₁ -V_(ce) in the case of the pixel P₁ and V_(pixn) =V_(n) -V_(ce) in the case of the pixel P_(n), V_(pix1) being different from V_(pixn). It is this which is represented in FIG. 3b. The grey level is therefore not the same at the start and at the end of line. This problem called "horizontal shading" is particularly important in the case of large-size screens.

One solution frequently used, and described in the document SID 94 Digest, page 263, consists in using a counter-pulse to reduce this effect. This solution is expensive since it requires more complicated drivers to be produced.

Another solution frequently used consists in reducing the resistivity of the lines. However, this implies increasing the thickness of the metal used to produce the line, which renders the process more expensive and more difficult to keep control of.

The present invention proposes a simple and effective solution to this problem of "horizontal shading".

SUMMARY OF THE INVENTION

The method according to the invention in fact consists in periodically scanning each line with a signal of time-varying voltage, each period of which consists of a plateau and a preferably negative slope the value of which is less than the value of the characteristic slope of the delay line at the end of line.

These characteristics can easily be implemented by virtue of drivers having a VDD analogue input allowing the high level VH to be controlled, such as, for example, the Toshiba drivers of the T6A02/T6A03 type.

Moreover, this method also makes it possible to reduce the coupling and thus the stray voltages on a screen.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be better understood and its additional advantages will emerge on reading the description which will follow, illustrated by the following figures:

FIG. 1, already described, is a diagram of an example of lines of a liquid-crystal screen.

FIG. 2, already described, represents the selection signal as it is received at the end of line and at the start of line, and illustrates the problem posed by the delay of the line,

FIGS. 3a and 3b represent the voltages of the pixels at the start and end of line,

FIGS. 4a and 4b represent the signals according to the invention respectively, received at the start and end of line respectively,

FIGS. 5a and 5b represent the voltages of the pixels controlled according to the invention at the start and end of line respectively,

and FIG. 6 represents the shape of the reference high level of a driver allowing the invention to be implemented.

DETAILED DESCRIPTION OF THE INVENTION

An embodiment of the present invention is represented by FIG. 4a, and consists in altering the shape of the signal delivered by the selection circuit so as to compensate for the delay effect of the line responsible for the horizontal shading. After a plateau of a width, for example, of 28 μs, and according to one important characteristic of the invention, the signal V_(A) (t) does not decrease abruptly (after a plateau of duration t_(F) -t_(i)), but, from t_(F), with a slope α preferably less than or equal to the characteristic slope of the delay line at point B, that is to say that α is less than ΔV/τ, τ being the characteristic time of the delay line at B and ΔV the potential drop at point A. An example of the value of α may be a few volts per μs. This signal thus decreases until the voltage V_(A) (t) is equal to V_(F'), at which voltage the transistors T1 to Tn are turned off. From this instant t_(F') the signal drops instantaneously.

Thus, between t_(F) and t_(F') (the duration t_(F') -t_(F) may be equal to 3 μs for 6 volts, for example), the signal is the same at point A and B, all the transistors of the line maintaining constant voltages on the pixels. The selection signal, with delay, complete with a slope α between t_(F) and t_(F'), is represented in FIGS. 4b.

From the instant T_(F'), the transistors T₁ and T_(n) are turned off, the coupling is therefore ΔV₁ =ΔV₂ =C_(p) /C×ΔV. The voltages at the terminals of the pixels P₁ and P_(n) are illustrated respectively by FIGS. 5a and 5b. It will be noted that the voltages on the pixels P₁ to P_(n) are equal and consequently that there is no horizontal shading.

A refinement of the method consists in using, between t_(F) and t_(F'), a curve which is not a straight-line portion but a portion of a function f(t) which remains unchanged by the transfer function of the delay line: applying f(t) to T₁ results in applying f(t-T) on T_(n), T being a delay. f(t) may, for example, be a sinusoid or a sum of sinusoids.

This method according to the invention can be implemented by a driver having an input which makes it possible to control the output current. By severely limiting the output current between t_(F) and t_(F'), it is possible to alter the standard signal so as to obtain the desired waveform.

It is also possible to use drivers which have an analogue input which makes it possible to define the high level V_(H). The desired signal is obtained at the output of the driver by modulating this input in such a way as to obtain a wave V_(H) having an inverse sawtooth shape as illustrated by FIG. 6. That is to say, at each line 1, 2, 3, 4, etc., the high level V_(H) is maintained on a plateau over a line period up to the instant T_(F), then lowered linearly until the instant T_(F'), when instantly raised back to the said plateau in order to scan the following line.

The present invention can be used for repairing flat liquid-crystal screens. In fact, known repair procedures exist, but they do not work as they increase the RC of the repaired line, which renders it visible since it does not experience the same coupling as the adjacent lines. By using the larger of the characteristic times of the repaired line or normal lines as τ, the repaired lines become similar to the adjacent lines.

The present invention applies to the control of flat liquid-crystal screens including peripheral or integrated drivers, and in particular to large-size screens. 

I claim:
 1. A method of matrix addressing in a structure comprising selection lines and data lines and having a switching element at the intersection of said selection and data lines controlled by a signal applied on said selection lines, said method comprising periodically scanning each selection line with a periodic voltage signal as a function of time applied to a control input of the switching element, each period of said periodic voltage signal comprising a plateau portion and then a curve portion, said curve portion chosen to pass from a value of the plateau portion to a value corresponding to a turn-off voltage of the switching element to compensate for voltage differences along said selection line, wherein said periodic voltage signal is delivered by an addressing circuit having an analog input making it possible to define a high level in an output and modulated by a periodic inverse sawtooth signal of selection line period.
 2. The method according to claim 1, wherein said selection line constitutes a delay line having a characteristic slope and wherein the curve portion is a straight-line portion of slope, the value of the slope being less than a value of a characteristic slope of the delay line at a terminal portion of said line.
 3. The method according to claim 2, wherein the slope is a negative slope.
 4. A method of matrix addressing in a structure comprising selection lines and data lines, at the intersection of which is a switching element controlled by a signal applied on said selection lines, said selection lines constituting delay lines having an initial portion associated with a first switching element and a terminal portion associated with a last switching element, said method comprising periodically scanning each line with a periodic signal of voltage as a function of time applied to a control input of each switching element, beginning with said first switching element and proceeding to said last switching element, each period of said voltage signal comprising a plateau portion and then a curve portion, wherein the curve portion is a straight-line portion of a slope, the value of the slope being less than a value of a characteristic slope of the delay line at the terminal portion of said line.
 5. The method according to claim 4, wherein the slope is a negative slope. 